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AXI-Ethernet-UVM
AXI-Ethernet-UVM PublicForked from kkenshin1/AXI-Ethernet-UVM
A Verification Platform for UDP Protocol Ethernet Module wrapped with AXI and APB bus based on UVM
SystemVerilog
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uvm-mcdf
uvm-mcdf PublicForked from KafCoppelia/uvm-mcdf
Mirror of william_william/uvm-mcdf on Gitee
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ddr5_phy
ddr5_phy PublicForked from Shehab-Naga/ddr5_phy
DDR5 PHY Graduation project (Verification Team) under supervision of Si-Vision
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UVM_Verification_for_P2S_Data_Converter
UVM_Verification_for_P2S_Data_Converter PublicForked from Dongtata2020/UVM_Verification_for_P2S_Data_Converter
为了学习UVM验证相关知识,需要动手尝试实际的项目。作为一个初学者,难以接触到实际的项目,于是我从夏宇闻老师的《Verilog数字系统设计教程》一书中,挑选出一个简单的小设计,作为我的验证对象,并围绕它编写了UVM验证环境。
SystemVerilog
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