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1. Basic-Digital-Verification-Analyst-Diploma Basic-Digital-Verification-Analyst-Diploma Public

   Under supervision of Eng. Sherif Hosny

   SystemVerilog

2. Radix-16-Modified-Booth-64-bit-Multiplier Radix-16-Modified-Booth-64-bit-Multiplier Public

   It is a SystemVerilog design of 64-bit Multiplier based on Radix-16 Modified Booth Algorithm

   SystemVerilog

3. MuhammadMajiid/RV64IMAC MuhammadMajiid/RV64IMAC Public

   RV64IMAC modelling using System Verilog HDL

   SystemVerilog 24 11

4. Digital-IC-Design-Diploma Digital-IC-Design-Diploma Public

   Under supervision of Eng. Ali El-Temsah

   Verilog

5. Verilog-course-codes Verilog-course-codes Public

   Forked from aseddin/ece_3300

   ECE 3300 HDL Code

   Verilog

6. Design-and-Implementation-of-Full-Featured-UART Design-and-Implementation-of-Full-Featured-UART Public

   This is a design of a fully configured uart transmitter and receiver using Verilog-HDL and implemented in DE10-Lite Max-10 FPGA Dev board

   Verilog